AMD ROCm™ Release Notes v4.5¶
October, 2021
This document describes the features, fixed issues, and information about downloading and installing the AMD ROCm™ software.
It also covers known issues and deprecations in this release.
List of Supported Operating Systems¶
The AMD ROCm platform supports the following operating systems:
OS |
Kernel |
---|---|
SLES15 SP3 |
5.3.18-24.49 |
RHEL 7.9 |
3.10.0-1160.6.1.el7 |
CentOS 7.9 |
3.10.0-1127 |
RHEL 8.4 |
4.18.0-193.1.1.el8 |
CentOS 8.3 |
4.18.0-193.el8 |
Ubuntu 18.04.5 |
5.4.0-71-generic |
Ubuntu 20.04.3HWE |
5.8.0-48-generic |
Host OS |
Azure RS1.86 |
Guest OS |
Ubuntu 20.04 |
Enhanced Installation Process for ROCm v4.5¶
In addition to the installation method using the native Package Manager, AMD ROCm v4.5 introduces added methods to install ROCm. With this release, the ROCm installation uses the amdgpu-install and amdgpu-uninstall scripts.
The amdgpu-install script streamlines the installation process by:
Abstracting the distribution-specific package installation logic
Performing the repository set-up
Allowing user to specify the use case and automating the installation of all the required packages,
Performing post-install checks to verify whether the installation was performed successfully
Installing the uninstallation script
The amdgpu-uninstall script allows the removal of the entire ROCm stack by using a single command.
Some of the ROCm-specific use cases that the installer currently supports are:
OpenCL (ROCr/KFD based) runtime
HIP runtimes
ROCm libraries and applications
ROCm Compiler and device libraries
ROCr runtime and thunk
For more information, refer to the Installation Methods section in this guide.
Note: Graphics use cases are not supported in this release.
For more details, refer to the AMD ROCm Installation Guide v4.5 at,
https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation_new.html
AMD ROCm v4.5 Documentation Updates¶
AMD ROCm Installation Guide¶
The AMD ROCm Installation Guide in this release includes the following updates:
New - Installation Guide for ROCm v4.5
https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation_new.html
AMD Instinct™ High Performance Computing and Tuning¶
New - AMD Instinct™ High Performance Computing and Tuning Guide
see AMD Instinct™ High Performance Computing and Tuning Guide
HIP Documentation Updates¶
HIP installation instructions
https://rocmdocs.amd.com/en/latest/Installation_Guide/HIP-Installation.html
HIP Programming Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_Programming_Guide.pdf
HIP API Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD-HIP-API-4.5.pdf
HIP-Supported CUDA API Reference Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_Supported_CUDA_API_Reference_Guide.pdf
AMD ROCm Compiler Reference Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_Compiler_Reference_Guide_v4.5.pdf
HIP FAQ
https://rocmdocs.amd.com/en/latest/Programming_Guides/HIP-FAQ.html#hip-faq
System Interface Management¶
System Interface Management (SMI)
https://rocmdocs.amd.com/en/latest/ROCm_System_Managment/ROCm-System-Managment.html
AMD ROCm Data Center Tool¶
AMD ROCm Data Center Tool API Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/RDC_API_Manual_4.5.pdf
AMD ROCm Data Center Tool User Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_ROCm_DataCenter_Tool_User_Guide_v4.5.pdf
ROCm SMI API Guide¶
ROC Debugger User and API Guide¶
ROCDebugger User Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/ROCDebugger_User_Guide.pdf
Debugger API Guide
https://github.com/RadeonOpenCompute/ROCm/blob/master/ROCDebugger_API_Guide.pdf
OpenMP Documentation¶
Updated OpenMP documentation
https://rocmdocs.amd.com/en/latest/Programming_Guides/openmp_support.html
AMD ROCm General Documentation Links¶
For AMD ROCm documentation, see
For installation instructions on supported platforms, see
https://rocmdocs.amd.com/en/latest/Installation_Guide/Installation-Guide.html
For AMD ROCm binary structure, see
https://rocmdocs.amd.com/en/latest/Installation_Guide/Software-Stack-for-AMD-GPU.html
For AMD ROCm release history, see
https://rocmdocs.amd.com/en/latest/Current_Release_Notes/ROCm-Version-History.html
What's New in This Release¶
HIP Enhancements¶
The ROCm v4.5 release consists of the following HIP enhancements:
HIP Direct Dispatch¶
The conventional producer-consumer model where the host thread(producer) enqueues commands to a command queue (per stream), which is then processed by a separate, per-stream worker thread (consumer) created by the runtime, is no longer applicable.
In this release, for Direct Dispatch, the runtime directly queues a packet to the AQL queue (user mode queue to GPU) in Dispatch and some of the synchronization. This new functionality indicates the total latency of the HIP Dispatch API and the latency to launch the first wave on the GPU.
In addition, eliminating the threads in runtime has reduced the variance in the dispatch numbers as the thread scheduling delays and atomics/locks synchronization latencies are reduced.
This feature can be disabled by setting the following environment variable,
AMD_DIRECT_DISPATCH=0
Support for HIP Graph¶
ROCm v4.5 extends support for HIP Graph. For details, refer to the HIP API Guide at,
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD-HIP-API-4.5.pdf
Enhanced launch_bounds Check Error Log Message¶
When a kernel is launched with HIP APIs, for example, hipModuleLaunchKernel(), HIP validates to check that input kernel dimension size is not larger than specified launch_bounds.
If exceeded, HIP returns launch failure if AMD_LOG_LEVEL is set with the proper value. Users can find more information in the error log message, including launch parameters of kernel dim size, launch bounds, and the name of the faulting kernel. It is helpful to figure out the faulting kernel. Besides, the kernel dim size and launch bounds values will also assist in debugging such failures.
For more details, refer to the HIP Programming Guide at
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_Programming_Guide.pdf
HIP Runtime Compilation¶
HIP now supports runtime compilation (hipRTC), the usage of which will provide the possibility of optimizations and performance improvement compared with other APIs via regular offline static compilation.
hipRTC APIs accept HIP source files in character string format as input parameters and create handles of programs by compiling the HIP source files without spawning separate processes.
For more details on hipRTC APIs, refer to the HIP API Guide at
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD-HIP-API-4.5.pdf
New Flag for Backwards Compatibility on float/double atomicAdd Function¶
In the ROCm4.5 release, a new compilation flag is introduced as an option in the CMAKE file. This flag ensures backwards compatibility in float/double atomicAdd functions.
\__HIP_USE_CMPXCHG_FOR_FP_ATOMICS
This compilation flag is not set(“0â€) by default, so the HIP runtime uses the current float/double atomicAdd functions.
If this compilation flag is set to “1†with the CMAKE option, the existing float/double atomicAdd functions is used for compatibility with compilers that do not support floating point atomics.
D__HIP_USE_CMPXCHG_FOR_FP_ATOMICS=1
For details on how to build the HIP runtime, refer to the HIP Programming Guide at
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_HIP_Programming_Guide.pdf
Updated HIP Version Definition¶
The HIP version definition is updated as follows:
HIP_VERSION=HIP_VERSION_MAJOR \* 10000000 + HIP_VERSION_MINOR \* 100000
+ HIP_VERSION_PATCH)
The HIP version can be queried from the following HIP API call,
hipRuntimeGetVersion(&runtimeVersion);
The version returned is always greater than the versions in the previous ROCm releases.
Note: The version definition of the HIP runtime is different from that of CUDA. The function returns the HIP runtime version on the AMD platform, while on the NVIDIA platform, it returns the CUDA runtime version. There is no mapping or a correlation between the HIP and CUDA versions.
Planned HIP Enhancements and Fixes¶
Changes to hiprtc implementation to match nvrtc behavior¶
In this release, there are changes to the hiprtc implementation to match the nvrtc behavior.
Impact: Applications can no longer explicitly include HIP runtime header files. Minor code changes are required to remove the HIP runtime header files.
HIP device attribute enumeration¶
In a future release, there will be a breaking change in the HIP device attribute enumeration. Enum values are being rearranged to accommodate future enhancements and additions.
Impact: This will require users to rebuild their applications. No code changes are required.
Changes to behavior of hipGetLastError() and hipPeekAtLastError() to match CUDA behavior available¶
In a later release, changes to behavior of hipGetLastError() and hipPeekAtLastError() to match CUDA behavior will be available.
Impact: Applications relying on the previous behavior will be impacted and may require some code changes.
Unified Memory Support in ROCm¶
Unified memory allows applications to map and migrate data between CPU and GPU seamlessly without explicitly copying it between different allocations. This enables a more complete implementation of hipMallocManaged, hipMemAdvise, hipMemPrefetchAsync and related APIs. Without unified memory, these APIs only support system memory. With unified memory, the driver can automatically migrate such memory to GPU memory for faster access.
Supported Operating Systems and Versions¶
This feature is only supported on recent Linux kernels. Currently, it works on Ubuntu versions with 5.6 or newer kernels and the DKMS driver from ROCm. Current releases of RHEL and SLES do not support this feature yet. Future releases of those distributions will add support for this. The unified memory feature is also supported in the KFD driver included with upstream kernels starting from Linux 5.14.
Unified memory only works on GFXv9 and later GPUs, including Vega10 and MI100. Fiji, Polaris and older GPUs are not supported. To check whether unified memory is enabled, look in the kernel log for this message:
$ dmesg \| grep "HMM registered"
If unified memory is enabled, there should be a “message like registered xyzMB device memory”. If unified memory is not supported on your GPU or kernel version, this message is missing.
Unified Memory Support and XNACK¶
Unified memory support comes in two flavours, XNACK-enabled and XNACK-disabled. XNACK refers to the ability of the GPU to handle page faults gracefully and retry a memory access. In XNACK-enabled mode, the GPU can handle retry after page-faults, which enables mapping and migrating data on demand, as well as memory overcommitment. In XNACK-disabled mode, all memory must be resident and mapped in the GPU page tables when the GPU is executing application code. Any migrations involve temporary preemption of the GPU queues by the driver. Both page fault handling and preemptions, happen automatically and are transparent to the applications.
XNACK-enabled mode only has experimental support. XNACK-enabled mode requires compiling shader code differently. By default, the ROCm compiler builds code that works in both modes. Code can be optimized for one specific mode with compiler options:
OpenCL:
clang ... -mcpu=gfx908:**xnack+**:sramecc- ... // xnack on, sramecc
off
clang ... -mcpu=gfx908:**xnack-**:sramecc+ ... // xnack off, sramecc
on
HIP:
clang ... --cuda-gpu-arch=gfx906:xnack+ ... // xnack on
clang ... --cuda-gpu-arch=gfx906:xnack- ... // xnack off
Not all the math libraries included in ROCm support XNACK-enabled mode on current hardware. Applications will fail to run if their shaders are compiled in the incorrect mode.
On the current hardware, the XNACK mode can be chosen at boot-time by a module parameter amdgpu.noretry. The default is XNACK-disabled (amdgpu.noretry=1).
System Management Interface¶
Enhanced ROCm SMI setpoweroverdrive Functionality¶
The ROCm System Management Interface (SMI) setpoweroverdrive functionality is used to lower the power cap on a device without needing to enable the OverDrive functionality in the driver. Similarly, even with the OverDrive driver functionality enabled, it is possible to request a lower power cap than the card’s default.
Currently, any use of the “setpoweroverdrive* functionality in rocm-smi prints an out-of-spec warning to the screen and requires the user to agree that using this functionality potentially voids their warranty. However, this warning should only be printed when users are trying to set the power cap to higher than the card’s default, which requires the OverDrive driver functionality to be enabled.
For example:
The default power cap is 225.0W before any changes.
[atitest@rhel85 smi]$ ./rocm_smi.py –resetpoweroverdrive
======================= ROCm System Management Interface
========================================================
========================== Reset GPU Power OverDrive
====================================================
GPU[0] : Successfully reset Power OverDrive to: 225W
============================ End of ROCm SMI Log
================================================
Now, after using –setpoweroverdrive to lower the power cap to 123 watts:
[atitest@rhel85 smi]$ ./rocm_smi.py –setpoweroverdrive 123
.. _rocm-system-management-interface-1:
======================= ROCm System Management Interface
========================================================
=========================== Set GPU Power OverDrive
===================================================
GPU[0] : Successfully set power to: 123W
.. _end-of-rocm-smi-log-1:
======================= End of ROCm SMI Log
===========================================
Setting a power cap lower than the default of 225.0W (in this case,
123W) does not give a warning.
To verify that the power is set to the correct value:
[atitest@rhel85 smi]$ ./rocm_smi.py –showmaxpower
.. _rocm-system-management-interface-2:
======================= ROCm System Management Interface
========================================================
======================== Power Cap ===================================
GPU[0] : Max Graphics Package Power (W): 123.0
.. _end-of-rocm-smi-log-2:
========================End of ROCm SMI Log
===========================================
OpenMP Enhancements¶
The ROCm installation includes an LLVM-based implementation, which fully supports OpenMP 4.5 standard and a subset of the OpenMP 5.0 standard. Fortran and C/C++ compilers and corresponding runtime libraries are included. Along with host APIs, the OpenMP compilers support offloading code and data onto GPU devices.
For more information, refer to
https://rocmdocs.amd.com/en/latest/Programming_Guides/openmp_support.html
ROCm Math and Communication Libraries¶
In this release, ROCm Math and Communication Libraries consists of the following enhancements and fixes:
Library |
Changes |
---|---|
rocBLAS |
Optimizations
Changes
Fixed
|
hipBLAS |
Added
Fixed
Changed
|
rocFFT |
Optimizations
Added
Changed
Fixed
|
hipFFT |
Changed
|
rocSPARSE |
Added
Improved
|
hipSPARSE |
Added
Improved
|
r ocALUTION |
Changed
Improved
|
rocTHRUST |
Changed
|
rocSOLVER |
Added
Optimized
Fixed
|
hipSOLVER |
The following functions were added in this release:
|
RCCL |
Added
Changed
|
hipCUB |
Changed
|
rocPRIM |
Added
Changed
Deprecated
|
rocRAND |
Changed
Fixed
Known issues
|
For more information about ROCm Libraries, refer to the documentation at
https://rocmdocs.amd.com/en/latest/ROCm_Libraries/ROCm_Libraries.html
Known Issues in This Release¶
The following are the known issues in this release.
Cache Issues with ROCProfiler¶
When the same kernel is launched back-to-back multiple times on a GPU, a cache flush is executed each time the kernel finishes when profiler data is collected. The cache flush is inserted by ROCprofiler for each kernel. This prevents kernel from being cached, instead it is being read each time it is launched. As a result the cache hit rate from rocprofiler is reported as 0% or very low.
This issue is under investigation and will be fixed in a future release.
Compiler Support for Function Pointers and Virtual Functions¶
A known issue in the compiler support for function pointers and virtual functions on the GPU may cause undefined behavior due to register corruption.
A temporary workaround is to compile the affected application with
-mllvm -amdgpu-fixed-function-abi=1* option
Note: This is an internal compiler flag and may be removed without notice once the issue is addressed in a future release.
Debugger Process Exit May Cause ROCgdb Internal Error¶
If the debugger process exits during debugging, ROCgdb may report internal errors. This issue occurs as it attempts to access the AMD GPU state for the exited process. To recover, users must restart ROCgdb.
As a workaround, users can set breakpoints to prevent the debugged process from exiting. For example, users can set breakpoints at the last statement of the main function and in the abort() and exit() functions. This temporary solution allows the application to be re-run without restarting ROCgdb.
This issue is currently under investigation and will be fixed in a future release.
For more information, refer to the ROCgdb User Guide at,
https://github.com/RadeonOpenCompute/ROCm/blob/master/AMD_ROCDebugger_User_Guide.pdf
clinfo and rocminfo Do Not Display Marketing Name¶
clinfo and rocminfo display a blank field for Marketing Name.
This is due to a missing package that is not yet available from ROCm. This package will be distributed in future ROCm releases.
Stability Issue on LAMMPS-KOKKOS Applications¶
On mGPU machines, lammps-kokkos applications experience a stability issue (AMD Instinct MI100™).
As a workaround, perform a Translation LookAside Buffer (TLB) flush.
The issue is under active investigation and will be resolved in a future release.
Deprecations¶
AMD Instinct MI25 End of Life¶
ROCm release v4.5 is the final release to support AMD Instinct MI25. AMD Instinct MI25 has reached End of Life (EOL). ROCm 4.5 represents the last certified release for software and driver support. AMD will continue to provide technical support and issue resolution for AMD Instinct MI25 on ROCm v4.5 for a period of 12 months from the software GA date.
Planned Deprecation for Code Object Versions 2 AND 3¶
With the ROCm v4.5 release, the generation of code object versions 2 and 3 is being deprecated and may be removed in a future release. This deprecation notice does not impact support for the execution of AMD GPU code object versions.
The -mcode-object-version Clang option can be used to instruct the compiler to generate a specific AMD GPU code object version. In ROCm v4.5, the compiler can generate AMD GPU code object version 2, 3, and 4, with version 4 being the default if not specified.
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